How to design a synchronous counter using J K- flip-flops for getting the following sequence, 0-6-4-2-0-6-4-2-0 - Quora
![Q. 6.28: Design a counter with the following repeated binary sequence 0, 1, 2, 4, 6 Use D flip-flops - YouTube Q. 6.28: Design a counter with the following repeated binary sequence 0, 1, 2, 4, 6 Use D flip-flops - YouTube](https://i.ytimg.com/vi/wnsPNZC-woQ/sddefault.jpg)
Q. 6.28: Design a counter with the following repeated binary sequence 0, 1, 2, 4, 6 Use D flip-flops - YouTube
How to design a synchronous counter 4 bit using JK flip flop that can count up even numbers from 0 to 14, and count down odd numbers from 15 to 0 in 1 system - Quora
![DESIGN OF A 7-SEGMENT UP COUNTER (0-9) USING JK FLIP- FLOP A PROJECT WORK ON CMP 221: DIGITAL ELECTRONICS II | Abe Joseph - Academia.edu DESIGN OF A 7-SEGMENT UP COUNTER (0-9) USING JK FLIP- FLOP A PROJECT WORK ON CMP 221: DIGITAL ELECTRONICS II | Abe Joseph - Academia.edu](https://0.academia-photos.com/attachment_thumbnails/58151285/mini_magick20190109-1598-zlrxne.png?1547075281)
DESIGN OF A 7-SEGMENT UP COUNTER (0-9) USING JK FLIP- FLOP A PROJECT WORK ON CMP 221: DIGITAL ELECTRONICS II | Abe Joseph - Academia.edu
![digital logic - In a JK Binary Counter from 0 to 9, why is the NAND gate connected to the second and fourth J-K flip flop and not the first and fourth? - digital logic - In a JK Binary Counter from 0 to 9, why is the NAND gate connected to the second and fourth J-K flip flop and not the first and fourth? -](https://i.stack.imgur.com/UCOWS.gif)